Extension of Two-Port Sneak Current Cancellation Scheme to 3-D Vertical RRAM Crossbar Array

被引:10
作者
Bae, Woorham [1 ,2 ]
Yoon, Kyung Jean [2 ,3 ]
Hwang, Cheol Seong [2 ,3 ]
Jeong, Deog-Kyoon [1 ,2 ]
机构
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 151742, South Korea
[2] Seoul Natl Univ, Interuniv Semicond Res Ctr, Seoul 151742, South Korea
[3] Seoul Natl Univ, Dept Mat Sci & Engn, Seoul 151742, South Korea
基金
新加坡国家研究基金会;
关键词
3-D crossbar array (CBA); resistive switching random-access memory (RRAM); two-port readout; vertical; SELECTOR DEVICE REQUIREMENTS; MEMORY;
D O I
10.1109/TED.2017.2664863
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
3-D integrations are unavoidable task for new emerging memories, including resistive switching random-access memory (RRAM), in order to overcome the market leading nand flash. However, an RRAM crossbar array (CBA) suffers severe read margin degradation due to the sneak current, which becomes even more critical as the memory density increases with the 3-D integration. In this paper, we extend the two-port readout scheme for a 2-D CBA, proposed in our previous work, to the 3-D vertical structure. A closed-form expression of the operating principle is derived, and HSPICE simulation using a 32 x 32 x 8 vertical RRAM CBA considering practical circuit parameters verifies feasibility of the two-port scheme to the 3-D CBA.
引用
收藏
页码:1591 / 1596
页数:6
相关论文
共 15 条
[1]   Scaling constraints in nanoelectronic random-access memories [J].
Amsinck, CJ ;
Di Spigna, NH ;
Nackashi, DP ;
Franzon, PD .
NANOTECHNOLOGY, 2005, 16 (10) :2251-2260
[2]   A crossbar resistance switching memory readout scheme with sneak current cancellation based on a two-port current-mode sensing [J].
Bae, Woorham ;
Yoon, Kyung Jean ;
Hwang, Cheol Seong ;
Jeong, Deog-Kyoon .
NANOTECHNOLOGY, 2016, 27 (48)
[3]  
Baek J, 2015, 2015 IEEE INT MEM WO, P1
[4]   Homogeneous barrier modulation of TaOx/TiO2 bilayers for ultra-high endurance three-dimensional storage-class memory [J].
Hsu, Chung-Wei ;
Wang, Yu-Fen ;
Wan, Chia-Chen ;
Wang, I-Ting ;
Chou, Chun-Tse ;
Lai, Wei-Li ;
Lee, Yao-Jen ;
Hou, Tuo-Hung .
NANOTECHNOLOGY, 2014, 25 (16)
[5]   Prospective of Semiconductor Memory Devices: from Memory System to Materials [J].
Hwang, Cheol Seong .
ADVANCED ELECTRONIC MATERIALS, 2015, 1 (06)
[6]  
Jang J., 2008, VLSI S, P192
[7]   32 x 32 Crossbar Array Resistive Memory Composed of a Stacked Schottky Diode and Unipolar Resistive Memory [J].
Kim, Gun Hwan ;
Lee, Jong Ho ;
Ahn, Youngbae ;
Jeon, Woojin ;
Song, Seul Ji ;
Seok, Jun Yeong ;
Yoon, Jung Ho ;
Yoon, Kyung Jean ;
Park, Tae Joo ;
Hwang, Cheol Seong .
ADVANCED FUNCTIONAL MATERIALS, 2013, 23 (11) :1440-1449
[8]   Crossbar RRAM Arrays: Selector Device Requirements During Write Operation [J].
Kim, Sungho ;
Zhou, Jiantao ;
Lu, Wei D. .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2014, 61 (08) :2820-2826
[9]  
Linn E, 2010, NAT MATER, V9, P403, DOI [10.1038/NMAT2748, 10.1038/nmat2748]
[10]   AC sense technique for memristor crossbar [J].
Qureshi, M. S. ;
Yi, W. ;
Medeiros-Ribeiro, G. ;
Williams, R. S. .
ELECTRONICS LETTERS, 2012, 48 (13) :757-758