Analysis and Construction of Hardware Accelerators for Calculating the Shortest Path in Real-Time Robot Route Planning

被引:0
|
作者
Esteves, Linton Thiago Costa [1 ]
de Oliveira, Wagner Luiz Alvez [2 ]
de Abreu Farias, Paulo Cesar Machado [2 ]
机构
[1] Inst Fed Baiano, BR-41720052 Salvador, Brazil
[2] Univ Fed Bahia, Dept Elect & Comp Engn, BR-40210910 Salvador, Brazil
关键词
dijkstra; FPGA; PRM; robotics; shortest path;
D O I
10.3390/electronics13112167
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This study introduces an optimization approach for calculating the shortest path in mobile robot route planning. The proposed solution targets real-time processing requirements by offering a high-performance alternative. This is achieved by embedding in the dedicated hardware an architecture which emphasizes parallelism. Through improvements in parallel exploration techniques, our solution aims to present not only a boost in performance but also a dynamic adaptation to graph changes, accommodating randomly occurring edge insertions or deletions as environmental conditions fluctuate. We present the developed architecture alongside its results. Our method efficiently updates obstacle matrices, resulting in a remarkable 120-fold improvement for 1024-node graphs. When utilizing a cost-effective device like the Cyclone IV E, it achieves approximately 12 times the performance of software applications.
引用
收藏
页数:23
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