High-Performance Wave Union Time-to-Digital Converter Implementation Based on Routing Path Delays of FPGA

Time-to-digital converters (TDCs) with superior performance are in high demand in application domains like light detection and ranging (LIDAR), nuclear physics, and time interval counters. One of the interesting architectures for field-programmable gate array (FPGA)-based TDCs is the tapped delay line (TDL) approach with carry chains as delay elements. However, the resolution of TDL-TDCs is limited, and linearity is weakened by the ultra-wide bins that correspond to the FPGA's long routing wires crossing into another clock area. This paper presents wave union TDC using FPGA internal routing wires as delay elements to subdivide ultra-wide bins. The Zynq Evaluation and Development (ZED) board is used to implement and test the wave union types: A (WU-A) and B (WU-B) TDCs. According to experimental data, the WU-A TDC based on an 8 x 128 matrix of counters has a resolution of 5.7 ps, an integral nonlinearity (INL) of 1.1170 LSB (RMS), and a differential nonlinearity of 0.329 LSB (RMS). WU-A TDC improves DNL and INL by 19% and 57%, respectively, over ordinary TDC. The WU-B TDC uses an average of sixteen different time measurements, resulting in an effective resolution of up to 0.356 ps, a DNL of 0.60 LSB (RMS), and an INL of 1.04 LSB (RMS). These characteristics make the TDC suitable for time-of-flight applications such as LIDAR and for other general-purpose scientific instruments.