Si Multi-Bridge Channel CMOS Inverter with Five Stacked Layers Fabricated from Epitaxial Si0.8Ge0.2/Si Multilayers

被引：0

作者：

Chang, Wei-Yuan ^{[1
]}

Luo, Guang-Li ^{[1
]}

Chu, Chun-Lin ^{[1
]}

Chen, Shih-Hong ^{[1
]}

Hsueh, Fu-Kuo ^{[1
]}

Chen, Bo-Yuan ^{[1
]}

Lee, Yao-Jen ^{[2
]}

Wu, Wen-Fa ^{[1
]}

机构：

[1] NARL, Taiwan Semicond Res Inst, Hsinchu, Taiwan

[2] Natl Yang Ming Chiao Tung Univ, Adv Semicond Inst, Hsinchu, Taiwan

来源：

2024 INTERNATIONAL VLSI SYMPOSIUM ON TECHNOLOGY, SYSTEMS AND APPLICATIONS, VLSI TSA | 2024年

关键词：

D O I：

10.1109/VLSITSA60681.2024.10546459

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This study successfully fabricates a CMOS device with an advanced 5- layer Si multi-bridge channel (MBC) through a highly selective dry etching process explicitly designed for GAA-FET manufacturing. The investigation employs highly selective etching processes, Atomic Layer Etching (ALE), to explore the impact of p/n-channel implantation with varying channel widths in creating highly stacked multi-bridge channels for advancing CMOS GAAFET technology.

引用

页数：2

共 4 条

[1] Barraud S, 2018, INT EL DEVICES MEET
[2] Chang W. Y., 2022, VLSI TSA, P1
[3] SiGe and Si Gate-All-Around FET Fabricated by Selective Etching the Same Epitaxial Layers
Chang, Wei-Yuan
Luo, Guang-Li
Huang, Yi-Shuo
Chu, Chun-Lin
Lee, Yao-Jen
Chen, Bo-Yuan
Lin, Chun-Hsiung
Wu, Wen-Fa
Yeh, Wen-Kuan
[J]. 6TH IEEE ELECTRON DEVICES TECHNOLOGY AND MANUFACTURING CONFERENCE (EDTM 2022), 2022, : 21 - 23
[4] Role of critical thickness in SiGe/Si/SiGe heterostructure design for qubits
Liu, Yujia
Gradwohl, Kevin-P.
Lu, Chen-Hsun
Remmele, Thilo
Yamamoto, Yuji
Zoellner, Marvin H. H.
Schroeder, Thomas
Boeck, Torsten
Amari, Houari
Richter, Carsten
Albrecht, Martin
[J]. JOURNAL OF APPLIED PHYSICS, 2022, 132 (08)

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