Low Loss Gate Engineered Superjunction Insulated Gate Bipolar Transistor for High Speed Application

被引:0
作者
Behera, Shriharsh Prasad [1 ]
Vaidya, Mahesh [2 ]
Naugarhiva, Alok [1 ]
机构
[1] Natl Inst Technol Raipur, Dept Elect & Commun Engn, Raipur, Madhya Pradesh, India
[2] Indian Inst Sci Bengaluru, Dept Elect Syst Engn, Bengaluru, India
来源
PROCEEDINGS OF THE 37TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, VLSID 2024 AND 23RD INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, ES 2024 | 2024年
关键词
IGBT; Superjuntainn; Stepped gate; V-on; Eoff;
D O I
10.1109/VLSID60093.2024.00005
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This article explains about electrical behavior of new Insulated Gate Bipolar Transistor (IGBT) by providing stepped oxide pattern at gate terminal with splitting N-poly structure in to three verticals. In order to form a stepped oxide pattern the bottom oxide thickness of the gate decreases from left to right. On the right side, the bottom oxide is thinner than the channel side. Furthermore, the oxide thickness along the channel wall has been kept thinner which increases Gate to emitter charges (Q(GC)) in comparison to conventional SJ-IGBT. These additional charges also lead to increase output current which helps to decrease area-specific on-resistance (R-on.A). However, reduced gate to collector charges (Q(GC)) is offered by increased bottom oxide thickness along the channel, which improves switching performance of the device and make it good candidate for high speed application. The collective advancement in Q(GE) and Q(GC) enables fast switching and provide 67% reduced turn-off loss (E-off). Additionally, in our study it is observed that modifiedworkfunction by replacing middle N-Poly with r-Poly reduces the peak electric field at the bottom side and enables 12% improvement in BY as compared to SJ-IGHT.
引用
收藏
页码:1 / 5
页数:5
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