A Model of Wafer Warpage for Trench Field-Plate Power MOSFETs

被引：1

作者：

Kato, Hiroaki ^{[1
]}

Cai, Bozhou ^{[1
]}

Yuan, Jiuyang ^{[1
]}

Miyamura, Yoshiji ^{[1
]}

Nishizawa, Shin-ichi ^{[1
]}

Saito, Wataru ^{[1
]}

机构：

[1] Kyushu Univ, IGSES, 6-1 Kasugakoen, Fukuoka 8168580, Japan

来源：

PHYSICA STATUS SOLIDI A-APPLICATIONS AND MATERIALS SCIENCE | 2024年 / 221卷 / 20期

关键词：

displacements; power metal-oxide-semiconductor fileld-effect transitors; stress; trench field plate; wafer warpage; PROCESS INTEGRATION; TECHNOLOGY; RESISTANCE; SILICON;

D O I：

10.1002/pssa.202400264

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

A new wafer warpage model is proposed for the full process design of trench field-plate (FP) power metal-oxide-semiconductor fileld-effect transitors (MOSFETs) using large-sized wafer. Trench FP power MOSFETs feature a deep trench and thick oxide at the wafer surface. Wafer warpage occurs due to the stress imbalance between the front and back sides of the wafer. This warpage leads to significant problems with transport errors in manufacturing equipment. This issue is expected to become even more crucial as lateral pitch narrowing is employed to reduce on-resistance. In this study, two methods are compared to estimate the warpage of a 200 mm diameter Si-wafer after trench etching and oxidation process. The mechanical stress generated by the oxidation process in several cell units is calculated using a 3D simulation. In the first approach, wafer warpage is converted from the displacement of the cell units. In the second approach, wafer warpage is estimated based on the surface film stress, which is calculated in the 3D simulation. The second approach shows good agreement with experimental results and is applicable to the 300 mm diameter Si process. This method yields more accurate measurements than the method using displacement. A new wafer warpage model is proposed for the process design of trench field-plate power MOSFETs. Two methods are compared to estimate the warpage. In the first approach, Firstly, wafer warpage is converted from the displacement of the cell units. Secondly, wafer warpage is estimated based on the surface film stress. The second approach shows good agreement with experimental results.image (c) 2024 WILEY-VCH GmbH

引用

页数：7

共 30 条

[1]

Baba Y., 1992, P ISPSD, P300, DOI [10.1109/ISPSD.1992.991291, DOI 10.1109/ISPSD.1992.991291]

[2]

Baliga B.J., 2003, U.S. Patent, Patent No. 6621121

[3] Trends in power discrete devices [J].

Baliga, BJ .

ISPSD '98 - PROCEEDINGS OF THE 10TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 1998, :5-10

[4]

Blanchard R. A., 1986, US Patent, Patent No. 4767722

[5] WARPAGE OF GAAS-ON-SI WAFERS AND ITS REDUCTION BY SELECTIVE GROWTH OF GAAS THROUGH A SILICON SHADOW MASK BY MOLECULAR-BEAM EPITAXY [J].

CHAND, N ;

VANDERZIEL, JP ;

WEINER, JS ;

SERGENT, AM ;

CHO, AY ;

GRIM, KA .

APPLIED PHYSICS LETTERS, 1988, 53 (03) :225-227

[6]

Chang H. R., 2017, IEEE T ELECTRON DEV, V64, P674

[7]

Gajda MA, 2006, INT SYM POW SEMICOND, P109

[8] Split-gate Resurf Stepped Oxide (RSO) MOSFETs for 25V applications with record low gate-to-drain charge [J].

Goarin, P. ;

Koops, G. E. J. ;

van Dalen, R. ;

Le Cam, C. ;

Saby, J. .

PROCEEDINGS OF THE 19TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS, 2007, :61-+

[9]

Karner S., 2023, PROC ISPSD, P32

[10] Strain Engineering in Si Split-Gate Trench Power MOSFETs by Partial Oxidation of Polysilicon Electrodes [J].

Karner, Stefan ;

Roesch, Maximilian ;

Galasso, Germano ;

Lee, Seung Hwan ;

Blank, Oliver .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 70 (03) :1168-1175

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