Highly Fault-Tolerant Systolic-Array-Based Matrix Multiplication

被引:1
作者
Lu, Hsin-Chen [1 ]
Su, Liang-Ying [1 ]
Huang, Shih-Hsu [1 ]
机构
[1] Chung Yuan Christian Univ, Dept Elect Engn, Taoyuan 320314, Taiwan
关键词
fault tolerance; integrated circuits; parallel processing; processing elements; reliability; IN REDUNDANCY ANALYSIS;
D O I
10.3390/electronics13091780
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Matrix multiplication plays a crucial role in various engineering and scientific applications. Cannon's algorithm, executed within two-dimensional systolic arrays, significantly enhances computational efficiency through parallel processing. However, as the matrix size increases, reliability issues become more prominent. Although the previous work has proposed a fault-tolerant mechanism, it is only suitable for scenarios with a limited number of faulty processing elements (PEs). This paper introduces a pair-matching mechanism, assigning a fault-free PE as a proxy for each faulty PE to execute its tasks. Our fault-tolerant mechanism comprises two stages: in the first stage, each fault-free PE completes its designated computations; in the second stage, computations intended for each faulty PE are executed by its assigned fault-free PE proxy. The experimental results demonstrate that compared to the previous work, our approach not only significantly improves the fault tolerance of systolic arrays (applicable to scenarios with a higher number of faulty PEs) but also reduces circuit areas. Therefore, the proposed approach proves effective in practical applications.
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页数:17
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