A novel high-performance TG-based SRAM cell with 5 nm FinFET technology

被引:0
作者
Pal, Sandipan [1 ]
Upadhyaya, Bijoy Kumar [1 ]
Majumder, Tanmoy [2 ]
Das, Narottam [3 ,4 ]
Bhattacharjee, Abhishek [1 ]
机构
[1] Tripura Inst Technol, Dept Elect & Commun, Agartala 799009, Tripura, India
[2] Vellore Inst Technol, Sch Elect Engn, Chennai 600127, India
[3] Cent Queensland Univ, Sch Engn & Technol, Melbourne Campus, Melbourne, Vic 3000, Australia
[4] Cent Queensland Univ, Ctr Intelligent Syst, Brisbane, Qld 4000, Australia
来源
ENGINEERING RESEARCH EXPRESS | 2024年 / 6卷 / 02期
关键词
FinFET; SRAM; low power; Static Noise Margin; SUBTHRESHOLD SRAM; RECONFIGURABLE FET; DESIGN;
D O I
10.1088/2631-8695/ad5812
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this study, we investigate the performance and reliability of a novel static random-access memory (SRAM) cell utilizing advanced 5 nm FinFET technology. Our research aims to address critical challenges in SRAM design by integrating transmission gates and power gated transistors. Through extensive simulations using the Cadence Virtuoso tool, we optimize the SRAM cell's read and write paths, resulting in substantial improvements in both functionalities. Additionally, our study unveils temperature-dependent variations in the read current and write margin, emphasizing the influence of temperature on SRAM performance. Compared to conventional FinFET SRAM circuits of equivalent bit-cell area and read latency, our innovative design showcases remarkable improvements across various parameters. Specifically, we achieve a commendable increase of 6.16% in the write static noise margin (WSNM) and 5.86% in the hold static noise margin (HSNM). Moreover, our findings reveal a substantial boost in read stability, increasing from 14.75% to 18.35%. These advancements underscore the promising potential of our approach in paving the way for future innovations in high-performance memory architectures. By leveraging state-of-the-art technology and meticulous optimization techniques, our research sets a new standard for SRAM design, offering enhanced performance, reliability, and efficiency in memory systems.
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页数:15
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