Power Integrity Design of Mobile 3D-IC Based on the Allocation of Optimal Number of TSV, BGA, and Via

被引：0
|
作者：
Kim, Hyunwoong [1 ]
Lee, Seonghi [1 ]
Park, Dongryul [1 ]
Son, Jungil [2 ]
Lee, Yongho [2 ]
Moon, Sungwook [2 ]
Kim, Jiseong [1 ]
Ahn, Seungyoung [1 ]
机构：
[1] Korea Adv Inst Sci & Technol, Daejeon, South Korea
[2] SAMSUNG Foundry, Hwaseong Si, South Korea
来源：
IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS, EDAPS 2023 | 2023年
关键词：
Genetic algorithm; Mobile; 3D-IC; power integrity; system-level design optimization; through-silicon via; via; OPTIMIZATION;
D O I：
10.1109/EDAPS58880.2023.10468263
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, the power integrity (PI) optimization design method is presented by utilizing the genetic algorithm (GA) to allocate the optimal number of through-silicon via (TSV), PKG via, ball grid array (BGA), and board via for 3D-IC. The system-level power distribution network (PDN) environment for 3D-IC is established based on the physical modeling method. The proposed optimal design method provided design results that are unbiased toward specific power domains compared to the random search. Through the PI analysis based on the optimized results, valuable insight can be obtained for the practical design of 3D-IC.
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页数：3
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