Asynchronous memory access unit for general purpose processors

被引：0
作者：
Wang L. [1 ,2 ]
Zhang X. [1 ,2 ]
Lu T. [1 ,2 ]
Chen M. [1 ,2 ]
机构：
[1] Institute of Computing Technology, Chinese Academy of Sciences, Beijing
[2] School of Computer Science and Technology, University of Chinese Academy of Sciences, Beijing
来源：
BenchCouncil Transactions on Benchmarks, Standards and Evaluations | 2022年 / 2卷 / 02期
关键词：
Asynchronous memory access; Far memory; Micro-architecture;
D O I：
10.1016/j.tbench.2022.100061
中图分类号：
学科分类号：
摘要：
In future data centers, applications will make heavy use of far memory (including disaggregated memory pools and NVM). The access latency of far memory is more widely distributed than that of local memory accesses. This makes the efficiency of traditional out-of-order load/store mechanism in most general-purpose processors decrease in this scenario. Therefore, this work proposes an in-core asynchronous memory access unit to fully utilize the far memory resources. © 2022 The Authors
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