Characterization of 65-nm CMOS Integrated Resistors in the Cryogenic Regime

This article presents the experimental characterization and modeling of CMOS resistors in a temperature range extending from room temperature (300 K) down to the deep cryogenic regime at 4 K. A set of poly-silicon resistors with different bulk structures and sizing have been fabricated in a 65 nm CMOS process and their I-V curves have been obtained experimentally in the 4 to 300 K range with a temperature step of only 0.5 K to obtain a large set of resistance values equally distributed along the temperature range. The plot of the resistance values against temperature has allowed us to obtain the temperature coefficient alpha(T) of the different resistors in the whole temperature range down to 4 K. Interestingly, for all the measured resistors the alpha(T) -T curves show a change in tendency for temperatures spanning from 66 to 98 K, this is, in the vicinity of the condensation temperature of nitrogen (77 K), where most of the thermal contraction of materials occurs.