Robust Control and Optimization of Delay-based Phase-locked Loop of Single-phase Grid-connected Inverters Under Weak Grid Conditions

In the single-phase grid-connected inverter, the delay-based phase-locked loop (PLL) is a commonly used method to synchronize the phase of point of common coupling (PCC) voltage. However, when the grid impedance is large, the grid-connected inverters with delay-based PLL may have problems of current harmonic amplification and system instability. At present, although some studies have explained this phenomenon, there are few effective methods to solve the adverse effects of delay-based PLL on system performance. Therefore, this paper aimed to optimize the typical delay-based PLL to improve system performance. First, it was explained how the delay-based PLL causes inverter system performance to degrade under the weak grid by modeling the output impedance of the inverter. Then, an optimal control and design method of delay-based PLL was proposed to improve the robustness of inverters under weak grid. The comparative experiments show that the single-phase grid-connected inverter with optimized method can still output high quality grid current even with the large grid impedance. © 2020 Chin. Soc. for Elec. Eng.