Cryogenic Embedded System to Support Quantum Computing: From 5-nm FinFET to Full Processor

被引:8
作者
Genssler, Paul R. [1 ]
Klemme, Florian [1 ]
Parihar, Shivendra Singh [1 ,2 ]
Brandhofer, Sebastian [3 ]
Pahwa, Girish [4 ]
Polian, Ilia [3 ]
Chauhan, Yogesh Singh [2 ]
Amrouch, Hussam [1 ,5 ,6 ]
机构
[1] Univ Stuttgart, Chair Semicond Test & Reliabil STAR, D-70174 Stuttgart, Germany
[2] IIT Kanpur, Dept Elect Engn, Nanolab, Kanpur 208016, India
[3] Univ Stuttgart, Chair Hardware Oriented Comp Sci, D-70174 Stuttgart, Germany
[4] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
[5] Tech Univ Munich, Chair AI Processor Design, D-80333 Munich, Germany
[6] Tech Univ Munich, Munich Inst Robot & Machine Intelligence, D-80333 Munich, Germany
来源
IEEE TRANSACTIONS ON QUANTUM ENGINEERING | 2023年 / 4卷
关键词
Qubit; Quantum computing; Temperature measurement; Cryogenics; Transistors; Semiconductor device measurement; Libraries; Cryogenic CMOS; 5-nm fin-shaped field-effect transistor (FinFET); hyperdimensional computing; machine learning classification; quantum computing; system on chip (SoC); NANOMETER CMOS; TRANSISTORS; OPERATION; DEVICES; FDSOI;
D O I
10.1109/TQE.2023.3300833
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Quantum computing can enable novel algorithms infeasible for classical computers. For example, new material synthesis and drug optimization could benefit if quantum computers offered more quantum bits (qubits). One obstacle for scaling up quantum computers is the connection between their cryogenic qubits at temperatures between a few millikelvin and a few kelvin (depending on qubit type) and the classical processing system on chip (SoC) at room temperature (300K). Through this connection, outside heat leaks to the qubits and can disrupt their state. Hence, moving the SoC into the cryogenic part eliminates this heat leakage. However, the cooling capacity is limited, requiring a low-power SoC, which, at the same time, has to classify qubit measurements under a tight time constraint. In this work, we explore for the first time if an off-the-shelf SoC is a plausible option for such a task. Our analysis starts with measurements of state-of-the-art 5-nm fin-shaped field-effect transistors (FinFETs) at 10 and 300 K. Then, we calibrate a transistor compact model and create two standard cell libraries, one for each temperature. We perform synthesis and physical layout of a RISC-V SoC at 300 K and analyze its performance at 10 K. Our simulations show that the SoC at 10 K is plausible but lacks the performance to process more than a few thousand qubits under the time constraint.
引用
收藏
页数:11
相关论文
共 36 条
[1]   Qiskit pulse: programming quantum computers through the cloud with pulses [J].
Alexander, Thomas ;
Kanazawa, Naoki ;
Egger, Daniel J. ;
Capelluto, Lauren ;
Wood, Christopher J. ;
Javadi-Abhari, Ali ;
McKay, David C. .
QUANTUM SCIENCE AND TECHNOLOGY, 2020, 5 (04)
[2]   Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs [J].
Amid, Alon ;
Biancolin, David ;
Gonzalez, Abraham ;
Grubb, Daniel ;
Karandikar, Sagar ;
Liew, Harrison ;
Magyar, Albert ;
Mao, Howard ;
Ou, Albert ;
Pemberton, Nathan ;
Rigge, Paul ;
Schmidt, Colin ;
Wright, John ;
Zhao, Jerry ;
Shao, Yakun Sophia ;
Asanovic, Krste ;
Nikolic, Borivoje .
IEEE MICRO, 2020, 40 (04) :10-20
[3]   Quantum supremacy using a programmable superconducting processor [J].
Arute, Frank ;
Arya, Kunal ;
Babbush, Ryan ;
Bacon, Dave ;
Bardin, Joseph C. ;
Barends, Rami ;
Biswas, Rupak ;
Boixo, Sergio ;
Brandao, Fernando G. S. L. ;
Buell, David A. ;
Burkett, Brian ;
Chen, Yu ;
Chen, Zijun ;
Chiaro, Ben ;
Collins, Roberto ;
Courtney, William ;
Dunsworth, Andrew ;
Farhi, Edward ;
Foxen, Brooks ;
Fowler, Austin ;
Gidney, Craig ;
Giustina, Marissa ;
Graff, Rob ;
Guerin, Keith ;
Habegger, Steve ;
Harrigan, Matthew P. ;
Hartmann, Michael J. ;
Ho, Alan ;
Hoffmann, Markus ;
Huang, Trent ;
Humble, Travis S. ;
Isakov, Sergei V. ;
Jeffrey, Evan ;
Jiang, Zhang ;
Kafri, Dvir ;
Kechedzhi, Kostyantyn ;
Kelly, Julian ;
Klimov, Paul V. ;
Knysh, Sergey ;
Korotkov, Alexander ;
Kostritsa, Fedor ;
Landhuis, David ;
Lindmark, Mike ;
Lucero, Erik ;
Lyakh, Dmitry ;
Mandra, Salvatore ;
McClean, Jarrod R. ;
McEwen, Matthew ;
Megrant, Anthony ;
Mi, Xiao .
NATURE, 2019, 574 (7779) :505-+
[4]  
Asanovic K., 2016, Tech. Rep. UCB/EECS-2016-17, V4
[5]   Theoretical Limit of Low Temperature Subthreshold Swing in Field-Effect Transistors [J].
Beckers, Arnout ;
Jazaeri, Farzan ;
Enz, Christian .
IEEE ELECTRON DEVICE LETTERS, 2020, 41 (02) :276-279
[6]   Cryogenic Subthreshold Swing Saturation in FD-SOI MOSFETs Described With Band Broadening [J].
Bohuslavskyi, H. ;
Jansen, A. G. M. ;
Barraud, S. ;
Barral, V. ;
Casse, M. ;
Le Guevel, L. ;
Jehl, X. ;
Hutin, L. ;
Bertrand, B. ;
Billiot, G. ;
Pillonnet, G. ;
Arnaud, F. ;
Galy, P. ;
De Franceschi, S. ;
Vinet, M. ;
Sanquer, M. .
IEEE ELECTRON DEVICE LETTERS, 2019, 40 (05) :784-787
[7]   The future of quantum computing with superconducting qubits [J].
Bravyi, Sergey ;
Dial, Oliver ;
Gambetta, Jay M. ;
Gil, Dario ;
Nazario, Zaira .
JOURNAL OF APPLIED PHYSICS, 2022, 132 (16)
[8]   Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology [J].
Chabane, Asma ;
Prathapan, Mridula ;
Mueller, Peter ;
Cha, Eunjung ;
Francese, Pier Andrea ;
Kossel, Marcel ;
Morf, Thomas ;
Zota, Cezar .
ESSCIRC 2021 - IEEE 47TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC), 2021, :67-70
[9]   Cold CMOS as a Power-Performance-Reliability Booster for Advanced FinFETs [J].
Chiang, H. L. ;
Chen, T. C. ;
Wang, J. F. ;
Mukhopadhyay, S. ;
Lee, W. K. ;
Chen, C. L. ;
Khwa, W. S. ;
Pulicherla, B. ;
Liao, P. J. ;
Su, K. W. ;
Yu, K. F. ;
Wang, T. ;
Wong, H. S. P. ;
Diaz, C. H. ;
Cai, J. .
2020 IEEE SYMPOSIUM ON VLSI TECHNOLOGY, 2020,
[10]  
Farhi E, 2014, Arxiv, DOI [arXiv:1411.4028, 10.48550/arXiv.1411.4028]