Capacitor Voltage Balancing Control Method for Modular Multilevel Converter Applicable for FPGA

被引:0
作者
Wang Y. [1 ]
Liu C. [1 ]
Li G. [1 ]
Sun J. [2 ]
Wu S. [2 ]
机构
[1] State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources (North China Electric Power University), Beijing
[2] Electric Power Dispatching and Control Centre of Guangdong Power Grid Co. Ltd., Guangzhou
来源
Dianli Xitong Zidonghua/Automation of Electric Power Systems | 2019年 / 43卷 / 08期
关键词
Capacitor voltage balancing; FPGA; Hardware-in-the-loop; Modular multilevel converter (MMC); Real-time simulation;
D O I
10.7500/AEPS20180204002
中图分类号
学科分类号
摘要
Sub-module capacitor voltage balancing is an important prerequisite for the stable operation of modular multilevel converter (MMC). In order to solve the problems of heavy computation burden and high switching frequency of devices, a novel capacitor voltage balancing control method applicable for field programmable gate array (FPGA) is proposed from the perspective of practical engineering. Several sub-intervals are divided according to the fluctuation range of capacitor voltage during normal operation, and sub-modules are matched into the corresponding sub-intervals according to the capacitor voltage measured in real-time. On this basis, for the sub-modules with capacitor voltage near the rated value, the switching state at the last control period is considered when grouping, and the switching frequency is further reduced according to the principle of keeping the original switching state unchanged as much as possible. The proposed method is developed and implemented in ML605-FPGA board, and a hardware-in-the-loop real-time simulation system is built with the real-time digital simulator. The simulation results verify the feasibility and effectiveness of the method. © 2019 Automation of Electric Power Systems Press.
引用
收藏
页码:167 / 173
页数:6
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