共 15 条
- [1] ARMSTRONG S E, OLSON B D, POPP J, Et al., Single-event transient error characterization of a radiation-hardened by design 90 nm SerDes transmitter driver, IEEE Transactions on Nuclear Science, 56, 6, pp. 3463-3468, (2009)
- [2] ARMSTRONG S E, OLSON B D, HOLMAN W T, Et al., Demonstration of a differential layout solution for improved ASET tolerance in CMOS A/MS circuits, IEEE Transactions on Nuclear Science, 57, 6, pp. 3615-3619, (2010)
- [3] YUAN H Z, CHEN J J, LIANG B, Et al., An SEU/SET-tolerant phase frequency detector with double loop self-sampling technology for clock data recovery, IEEE Transactions on Nuclear Science, 66, 7, pp. 1483-1490, (2019)
- [4] YUAN H Z, CHEN J J, LIANG B, Et al., Fault-tolerant multi-node coupling triple mode redundancy voltage controlled oscillator for reducing soft error in clock and data recovery, Electronics Letters, 55, 5, pp. 250-251, (2019)
- [5] YUAN H Z, GUO Y, CHEN J J, Et al., 28 nm fault-tolerant hardening-by-design frequency divider for reducing soft errors in clock and data recovery, IEEE Access, 7, pp. 47955-47961, (2019)
- [6] ZANCHI Z, BUCHNER S, HAFER C, Et al., Investigation and mitigation of analog SET on a bandgap reference in triple-well CMOS using pulsed laser techniques, IEEE Transactions on Nuclear Science, 58, 6, pp. 2570-2577, (2011)
- [7] ZHAO Q F, YANG G Q, SUN Y J, Et al., Research on the effect of single-event transient of an on-chip linear voltage regulator fabricated on 130 nm commercial CMOS technology, Microelectronics Reliability, 73, pp. 116-121, (2017)
- [8] SAVOJ J, RAZAVI B., A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector, IEEE Journal of Solid-State Circuits, 36, 5, pp. 761-768, (2001)
- [9] TAN J W, GUO Y, CHEN J J, Et al., A state recovery design against single-event transient in high-speed phase interpolation clock and data recovery circuit, 2017 IEEE 12th International Conference on ASIC, pp. 339-342, (2017)
- [10] YUAN H Z, CHEN J J, LIANG B, Et al., A radiation hardened low-noise voltage-controlled-oscillator using negative feedback based multipath-current-releasing technology, Proceedings of International Conference on ASIC, 2017 IEEE 12th International Conference on ASIC, pp. 241-244, (2017)