An OTA-Less Second-Order VCO-Based CT $\Delta\Sigma$ Modulator Using an Inherent Passive Integrator and Capacitive Feedback

被引:19
|
作者
Li, Shaolan [1 ,2 ]
Pan, David Z. [3 ]
Sun, Nan [3 ]
机构
[1] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA
[2] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
[3] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA
关键词
Delta sigma modulator (DSM); analog-to-digital converter (ADC); capacitive feedback; cascaded-integrator feedback (CIFB); voltage-controlled oscillator (VCO); VCO-based ADC; noise shaping; oversampling ADC; passive loop filter; MHZ BANDWIDTH; LOW-POWER; 0.2; V; MU-W; ADC; COMPENSATION; QUANTIZER; FOM;
D O I
10.1109/JSSC.2019.2941007
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Voltage-controlled oscillator (VCO)-based continuous-time $\Delta \Sigma $ modulators (CTDSMs) are deemed attractive for deep-scaled process. However, to realize high-order noise shaping, existing works still employ operational transconductance amplifiers (OTAs), which limits the benefits brought by the VCO. This article presents an OTA-less second-order VCO-based CTDSM featuring a hybrid passive-VCO architecture. It exploits the gain-efficient and scaling-friendly nature of the VCO integrator, enabling the use of a fully passive loop filter to increase the order with minimum power. The proposed architecture is realized in a low-cost, low-noise cascaded-integrator feedback structure that makes use of the parasitic effect of the VCO as an inherent passive stage. Fabricated in 40-nm CMOS, the prototype occupies 0.028 mm(2) of active area and consumes 590 $\mu \text{W}$ when sampling at 330 MHz. The CTDSM achieved peak Walden figure of merits of 22 fJ/step with 68.7-dB signal to noise and distortion ratio (SNDR) over 6-MHz bandwidth.
引用
收藏
页码:1337 / 1350
页数:14
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