Model matching control of asynchronous sequential circuits with non-fundamental mode faults

This paper proposes a novel corrective controller that achieves model matching for asynchronous sequential circuits vulnerable to faults occurring to transient states. When such faults occur, asynchronous sequential circuits, in the course of exhibiting their transient behaviors, experience unauthorized state transitions, thereby reaching faulty next stable states. We will address the existence condition and the design procedure for a proper corrective controller that matches the stable-state behavior of the controlled asynchronous sequential circuit to that of a reference model while eliminating the adverse effects of all faults occurring in transient states. The corrective controller and the asynchronous sequential circuit will be implemented on a field-programmable gate array (FPGA) to evaluate the efficiency and applicability of the proposed control scheme. © ICROS 2021.