Low Area and High Bit Resolution Flash Analog to Digital Converter for Wide Band Applications: A Review

被引：0

作者：

Krishna B. ^{[1
]}

Gill S.S. ^{[1
]}

Kumar A. ^{[1
]}

机构：

[1] Department of Electronics and Communication Engineering and Technology, National Institute of Technical Teachers Training and Research, Chandigarh

来源：

Micro and Nanosystems | 2022年 / 14卷 / 03期

关键词：

comparator; encoder; Flash ADC(Analog-to-digital converter); high resolution; high-speed DAC; low area; MUX; two-step method;

D O I：

10.2174/1876402913666210820111312

中图分类号：

学科分类号：

摘要：

This work reviews the design challenges of CMOS flash type Analog-to-Digital Converter (ADC) for making high bit resolution, low area, low noise, low offset, and power-efficient architecture. Low-bit resolution flash ADC architecture, high-speed applications, and wide-area parallel comparators are identified on their suitability of the design for ADCs. These are effective in the area and bit resolu-tion. The overview includes bit resolution, area, power dissipation, bandwidth and offset noise consid-eration for high-speed flash ADC design. A MUX-based two-step half flash architecture is considered for applications requiring 1 GHz 16-bit resolution low area and low power consumption. An advanced comparator, MUX, a high-speed digital-to-analog converter (DAC), and MUX-based encoder are also reviewed. The design of technology-efficient ADC architecture is highly challenging for the analog designer. © 2022 Bentham Science Publishers.

引用

页码：191 / 197

页数：6

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