2-D Si0.8Ge0.2 source double-gate pocket PTFET for low power application: Modeling and simulation

被引:0
|
作者
Niranjan, Neeraj Kumar [1 ]
Sarkar, Paramita [2 ]
Bhowmick, Brinda [1 ]
Choudhury, Madhuchhanda [1 ]
Baishnab, Krishna Lal [1 ]
Das Lala, Sumit [3 ]
Mishra, Richa [4 ]
机构
[1] Natl Inst Technol Silchar, Dept Elect & Commun Engn, Silchar 788010, Assam, India
[2] BMS Inst Technol & Management, Dept Elect & Commun Engn, Bengaluru 560064, Karnataka, India
[3] Parul Univ, Dept Mech Engn, Vadodara 391760, Gujrat, India
[4] Parul Univ, Dept Comp Sci & Engn, Vadodara 391760, Gujrat, India
来源
MATERIALS SCIENCE AND ENGINEERING B-ADVANCED FUNCTIONAL SOLID-STATE MATERIALS | 2024年 / 303卷
关键词
PTFETs; Pocket; Dual gate; Band to band tunneling; TCAD; FIELD-EFFECT TRANSISTOR; TUNNEL-FET; PERFORMANCE; OPTIMIZATION; ENHANCEMENT; MODULATION;
D O I
10.1016/j.mseb.2024.117290
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
To process 1 -bit of information the small supply voltage (Vdd) and minimal leakage current are needed for transistors. Subthreshold swing (SS) of 60 mV/dec at 300 K is the basic bottleneck in metal oxide semiconductor field effect transistors. DFT in QuantumATK R-2020.09 was used to study Si0.8Ge0.2 band structure and band gap. A p -type tunnel field effect transistor (PTFET) was modeled employing the dual gate concept. Top gate has two metals; source and counter doped pocket are Si0.8Ge0.2. According to the proposed device simulation, the proposed device is showing excellent thermal stability for large on-current (Ion), weak off-current (Ioff), and weak ambipolar current (Iambi) at different temperatures. The proposed device achieves the Ion of 72.44 mu A/mu m and 3.2 mu A/mu m at supply voltage of -1 V and -0.5 V, respectively. At -0.5 V of Vdd, current ratio of Ion/Ioff is more than 1012, so device can be used for low power applications.
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页数:11
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