Design of a multilayer reversible ALU in QCA technology

A promising alternative for the CMOS technology is the Quantum-dot Cellular Automata (QCA) technology. In this technology, the low-latency, ultra-dense, and low-power consumption digital circuits are designed. Until now, many digital circuits are designed and improved in the QCA technology. The Arithmetic Logic Unit (ALU) is an important digital circuit that designed in this technology. The reversible logic gates such as NOT, Feynman, and Fredkin gates are important elements in the arithmetic circuits and processors design. In addition, considering the cell arrangements has a great influence on the area and speed of execution of computing devices in the QCA technology. This paper's goal is to build a new multilayer QCA Reversible ALU (RALU). In this paper, we used one HN and three Fredkin gates to design and implement a new and efficient RALU circuit in the QCA technology. The proposed QCA RALU circuit is simulated and tested using QCADesigner tool. The simulation results demonstrate that the developed QCA multilayer RALU has 489 cells, 0.36 mu m2 area, 3.75 clock cycles delay, 2.02 meV average energy, and 5.41 nW power dissipation. In addition, the comparison indicates that the developed QCA RALU circuit has advantages compared to other QCA RALU circuits with regards to energy, area, latency, and cost.