HIGH-SPEED SINGLE ERROR CORRECTING CONVERTER FOR RESIDUE NUMBER PROCESSING

被引:2
|
作者
ZHANG, CN [1 ]
CHENG, HD [1 ]
机构
[1] TECH UNIV NOVA SCOTIA,SCH COMP SCI,HALIFAX B3J 2X4,NS,CANADA
来源
关键词
CHINESE REMAINDER THEOREM; ERROR DETECTION AND CORRECTION; RESIDUE NUMBER SYSTEM; SYSTOLIC ARRAY;
D O I
10.1049/ip-e.1991.0024
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A new pipelined systolic design for residue error correction using Chinese remainder theorem is described which has a higher through-put compared with previous methods and minimum time latency. In addition, the new design has the capability of overflow detection and self-diagnosing.
引用
收藏
页码:177 / 182
页数:6
相关论文
共 50 条
  • [31] HIGH-SPEED DIODE PROCESSING
    JOHNSON, AF
    WESTERN ELECTRIC ENGINEER, 1982, 26 (03): : 19 - 25
  • [32] High-speed ΔΣ ADC with error correction
    Kiss, P
    Moon, U
    Steensgaard, J
    Stonick, JT
    Temes, GC
    ELECTRONICS LETTERS, 2001, 37 (02) : 76 - 77
  • [33] ERROR CORRECTION IN HIGH-SPEED ARITHMETIC
    CHIEN, RT
    HONG, SJ
    IEEE TRANSACTIONS ON COMPUTERS, 1972, C 21 (05) : 433 - &
  • [34] BURST-CORRECTING CODES WITH HIGH-SPEED DECODING
    CHIEN, RT
    IEEE TRANSACTIONS ON INFORMATION THEORY, 1969, 15 (1P1) : 109 - +
  • [35] A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC NOR Flash Memories
    Wang Xueqiang
    Pan Liyang
    Wu Dong
    Hu Chaohong
    Zhou Runde
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2009, 56 (11) : 865 - 869
  • [36] High-Speed Reed-Solomon Errors-and-Erasures Decoder Design with Burst Error Correcting
    Yuan, Bo
    Sha, Jin
    Li, Li
    Wang, Zhongfeng
    2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 485 - +
  • [37] AN ALGORITHM FOR SCALING AND SINGLE RESIDUE ERROR CORRECTION IN RESIDUE NUMBER-SYSTEMS
    SU, CC
    LO, HY
    IEEE TRANSACTIONS ON COMPUTERS, 1990, 39 (08) : 1053 - 1064
  • [38] A high-speed division algorithm in residue number system using parity-checking technique
    Yang, JH
    Chang, CC
    Chen, CY
    INTERNATIONAL JOURNAL OF COMPUTER MATHEMATICS, 2004, 81 (06) : 775 - 780
  • [39] A HIGH-SPEED RANDOM NUMBER GENERATOR
    DONOV, GI
    IZVESTIYA VYSSHIKH UCHEBNYKH ZAVEDENII RADIOELEKTRONIKA, 1982, 25 (04): : 90 - 92
  • [40] Design of a high speed reverse converter for a new 4-moduli set residue number system
    Cao, B
    Srikanthan, T
    Chang, CH
    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY, 2003, : 520 - 523