NEW HARDWARE SCHEME SUPPORTING PRECISE EXCEPTION HANDLING FOR OUT-OF-ORDER EXECUTION

被引：0
|
作者：
HWANG, GC
KYUNG, CM
机构：
[1] Department of Electrical Engineering, KAIST
来源：
ELECTRONICS LETTERS | 1994年 / 30卷 / 01期
关键词：
COMPUTER ARCHITECTURE; PARALLEL ARCHITECTURES;
D O I：
10.1049/el:19940022
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new hardware scheme is proposed to resolve data and control hazards and assure precise exception on out-of-order execution in a microarchitecture with multiple pipelined functional units. The core of the proposed hardware is a register file called CARE, which is made of CAM (content-addressable memory), with an efficient state-transition mechanism for precise exception handling and prompt branch misprediction recovery.
引用
收藏
页码：16 / 17
页数：2
相关论文
共 3 条
  • [1] Fast precise interrupt handling without associative searching in multiple out-of-order issue processors
    Nam, SJ
    Park, IC
    Kyung, CM
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1999, E82D (03) : 645 - 653
  • [2] HAWS: Accelerating GPU Wavefront Execution through Selective Out-of-order Execution
    Gong, Xun
    Gong, Xiang
    Yu, Leiming
    Kaeli, David
    ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2019, 16 (02)
  • [3] Repurposing GPU Microarchitectures with Light-Weight Out-Of-Order Execution
    Iliakis, Konstantinos
    Xydis, Sotirios
    Soudris, Dimitrios
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2022, 33 (02) : 388 - 402
1