DEEP-SUBMICROMETER CMOS TECHNOLOGY WITH REOXIDIZED OR ANNEALED NITRIDED-OXIDE GATE DIELECTRICS PREPARED BY RAPID THERMAL-PROCESSING

Deep-submicrometer CMOSFET's with re-annealed nitride-oxide gate dielectrics have been demonstrated for the first time to satisfy 3.3-V operation unlike the conventional oxide FET's. The 1/4-mu-m re-annealed nitrided-oxide CMOS devices achieve 1) an improved saturation transconductance g(m) of approximately 250-mu-S/mu-m for n-FET's together with acceptably small degradation in p-FET g(m) resulting in an excellent CMOS gate delay time of 55 ps/stage comparable or superior to the device/circuit performance of oxide FET's, and 2) device lifetimes improved by approximately 100 times to exceed 10 years with respect to both ON- and OFF-state hot-carrier reliability for n-FET's as well as gate-dielectric integrity (TDDB) together with unchanged p-FET hot-carrier reliability, all at 3.3-V operation. To achieve the above CMOS performance/reliability improvements, both a light nitridation and subsequent re-annealing in O2 (reoxidation) or in N2 (inert-annealing) are found to be crucial. The re-annealed nitrided-oxide gate dielectrics are most promising for deep-submicrometer CMOS technology at 3.3-V operation.