A Thermal-Aware Scheduling Algorithm for Core Migration in Multicore Processors

被引:2
|
作者
Eratne, Savithra [1 ,2 ]
Nair, Pradeep [2 ,3 ]
John, Eugene [4 ]
机构
[1] Univ Texas San Antonio, Dept Elect & Comp Engn, San Antonio, TX 78249 USA
[2] IEEE, Piscataway, NJ USA
[3] Calif State Univ Fullerton, Comp Engn Program, Comp Engn, Fullerton, CA 92831 USA
[4] Univ Texas San Antonio, Dept Elect & Comp Engn, Elect & Comp Engn, San Antonio, TX 78249 USA
关键词
Thermal Aware Design; Core Scheduling; Migration; Multicore Processor;
D O I
10.1166/jolpe.2015.1373
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multicore processors traditionally achieve increased throughput as compared to their single core counterparts by trading off area and speed performance. The reduced gate lengths that accompany process technology scaling increase the leakage power dissipation and, consequently, lead to higher power densities and thermal hotspots. Reduction of power densities and thermal hotspots is of utmost importance for proper long-term operation of the processor. In this paper, we propose a scheduling algorithm to migrate the jobs running on one processor core to other cores when the temperature in the former reaches a pre-defined threshold value. The proposed algorithm takes into account the temperature of each core identified as a prospective target for migration as well as the proximity of the prospective core to the core which is selected for job migration. The proposed algorithm is also capable of identifying the possible thermal coupling between neighboring cores. Significant temperature reduction can be achieved through the proposed scheduling and job migration by trading off some speed performance: A 6 degrees C temperature reduction was observed with a 2% delay penalty for the scheduling approach employed in this work.
引用
收藏
页码:103 / 111
页数:9
相关论文
共 50 条
  • [1] Thermal-Aware Task Scheduling for 3D Multicore Processors
    Zhou, Xiuyi
    Yang, Jun
    Xu, Yi
    Zhang, Youtao
    Zhao, Jianhua
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2010, 21 (01) : 60 - 71
  • [2] A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors
    He, Liqiang
    Narisu, Cha
    ADVANCED PARALLEL PROCESSING TECHNOLOGIES, PROCEEDINGS, 2009, 5737 : 1 - 10
  • [3] A thermal-aware scheduling for multicore architectures
    Chien, Ting-Hsuan
    Chang, Rong-Guey
    JOURNAL OF SYSTEMS ARCHITECTURE, 2016, 62 : 54 - 62
  • [4] THERMAL-AWARE POWER MIGRATION IN MANY-CORE PROCESSORS
    Raghu, Avinash
    Karajgikar, Saket
    Agonafer, Dereje
    Sammakia, Bahgat
    PROCEEDINGS OF THE ASME INTERNATIONAL MECHANICAL ENGINEERING CONGRESS AND EXPOSITION 2010, VOL 4, 2012, : 397 - 404
  • [5] Thermal-aware Scheduling for Data Parallel Workloads on Multi-Core Processors
    Tan, Hengxing
    Ranka, Sanjay
    2014 IEEE SYMPOSIUM ON COMPUTERS AND COMMUNICATION (ISCC), 2014,
  • [6] Thermal-Aware Global Real-Time Scheduling on Multicore Systems
    Fisher, Nathan
    Chen, Jian-Jia
    Wang, Shengquan
    Thiele, Lothar
    15TH IEEE REAL-TIME AND EMBEDDED TECHNOLOGY AND APPLICATION SYMPOSIUM: RTAS 2009, PROCEEDINGS, 2009, : 131 - +
  • [7] An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors
    Mandal, Sudipa
    Gaurkar, Krushna
    Dasgupta, Pallab
    Hazra, Aritra
    2021 34TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2021 20TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID & ES 2021), 2021, : 181 - 186
  • [8] Thermal-Aware Microchannel Cooling of Multicore Processors: A Three-Stage Design Approach
    Li, Yubai
    Guo, Dongzhi
    Yao, Shi-Chune
    JOURNAL OF ELECTRONIC PACKAGING, 2014, 136 (02)
  • [9] Thermal-aware global real-time scheduling and analysis on multicore systems
    Fisher, Nathan
    Chen, Jian-Jia
    Wang, Shengquan
    Thiele, Lothar
    JOURNAL OF SYSTEMS ARCHITECTURE, 2011, 57 (05) : 547 - 560
  • [10] Thermal-Aware Lifetime Reliability in Multicore Systems
    Wang, Shengquan
    Chen, Jian-Jia
    PROCEEDINGS OF THE ELEVENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2010), 2010, : 399 - 405