DESIGN AND VALIDATION OF CONCURRENT PROCESSES WITH TIMING SEQUENCE DIAGRAMS

被引:0
作者
PILLER, U [1 ]
机构
[1] FACH HSCH KOLN,FACHBEREICH NACHRICHTENTECH,W-5000 COLOGNE,GERMANY
来源
MICROPROCESSING AND MICROPROGRAMMING | 1990年 / 26卷 / 05期
关键词
Concurrent processes; Design tools; Real-time multitasking operating system; Specification methods; Timing sequence diagrams;
D O I
10.1016/0165-6074(90)90333-5
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In real-time operating systems and multiprocessor systems concurrent (parallel) application- and I/O-processes must be correctly synchronized. The design of a computer controlled system is supplemented by modified timing sequence diagrams. The timing sequence diagrams specify task sequences, intertask communication and the allocation of system resources. This kind of specification can afterwards be easily validated by measurements. For this purpose, a real-time tracing method is proposed where all relevant process data are stored in a trace memory during running time. After a test run, the stored sequence data are presented in the form of a timing sequence diagram with the aid of a PC program. Thus the timing in a computer controlled system can be easily traced and analyzed at any level of abstraction. © 1990.
引用
收藏
页码:339 / 350
页数:12
相关论文
共 4 条
[1]  
PILLER U, 1984, DARSTELLUNG ZEIT KOM, V105, P892
[2]  
PILLER U, 1988, ENTWURF MC GESTEUERT
[3]  
STUHLWEISSENBURG J, 1987, THESIS FH KOLN
[4]  
ZIRVES M, 1989, THESIS FH KOLN