POISSON-PROCESS AND INTEGRATED-CIRCUIT YIELD PREDICTION

被引：13

作者：

HEMMERT, RS

机构：

来源：

关键词：

D O I：

10.1016/0038-1101(81)90069-1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：511 / 515

页数：5

共 13 条

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GUPTA, A ;

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HOFSTEIN, SR ;

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[3]

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[4]

MADLAND GR, 1966, ELECTRON IND APR, P40

[5]

MOORE GE, 1970, ELECTRONICS, V43, P126

[6] COST-SIZE OPTIMA OF MONOLITHIC INTEGRATED CIRCUITS [J].

MURPHY, BT .

[7] A NEW LOOK AT YIELD OF INTEGRATED CIRCUITS [J].

PRICE, JE .

PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1970, 58 (08) :1290-&

[8] COMPOSITE MODEL TO IC YIELD PROBLEM [J].

STAPPER, CH .

[9] LSI YIELD MODELING AND PROCESS MONITORING [J].

STAPPER, CH .

[10]

STAPPER CH, 1967, IEEE INT CONV REC, V6, P60