A SWITCHED MEMORY DECODING SYSTEM FOR A MULTIPLE PROCESSOR SYSTEM

被引:0
作者
ZHOU, S
SANDLER, MB
BERGMAN, GD
机构
[1] Department of Electronic and Electrical Engineering, King's College London, University of London, London
关键词
SMD; OSMMA; PROCESSING ELEMENTS;
D O I
10.1016/0141-9331(91)90004-Y
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The application of a switched memory decoding (SMD) system to a multiprocessor system is described. This is found to result in a considerable reduction in software execution time. A combination of an SMD system and an OSMMA multiprocessor has been built. When this architecture is used for processing the images from a video camera the processed images can be displayed immediately on a monitor so that real-time image processing is achieved. Provided the data processing time for a single image is less than 40 ms no image information is lost. The execution times that were measured on the system for a number of typical image processing algorithms are presented.
引用
收藏
页码:481 / 487
页数:7
相关论文
共 10 条
[1]   HIGH-SPEED ACCESS TO STORED DATA USING SWITCHED MEMORY DECODING [J].
BERGMAN, GD .
MICROPROCESSORS AND MICROSYSTEMS, 1987, 11 (04) :209-214
[2]  
CHEN Z, 1987, SPIE, V848, P631
[3]   SHARED MEMORIES IN THE CYBA-M MULTIMICROPROCESSOR [J].
DAGLESS, EL ;
EDWARDS, MD ;
PROUDFOOT, JT .
IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1983, 130 (04) :116-124
[4]  
FLETCHER MJ, 1990, ELECTR COMM ENG OCT, P195
[5]  
GOTTLIEB A, 1983, IEEE T COMPUT, V32, P175, DOI 10.1109/TC.1983.1676201
[6]  
Naqvi A. A., 1989, Parallel Processing for Computer Vision and Display, P145
[7]   BENCHMARKING PROCESSORS FOR IMAGE-PROCESSING [J].
SANDLER, MB ;
HAYAT, L ;
COSTA, LDF .
MICROPROCESSORS AND MICROSYSTEMS, 1990, 14 (09) :583-588
[8]  
ZHOU S, 1990, P IEE C ICCS 90, V2
[9]  
1986, ITEX 100 PROGRAMMES
[10]  
1988, PROGRAMMABLE GATE AR