ELECTRON TRAPPING AND INTERFACE STATE GENERATION IN PMOSFETS - RESULTS FROM GATE CAPACITANCE

被引：7
作者：
LING, CH
机构：
[1] Department of Electrical Engineering, National Universiry of Singapore, Kent Ridge
来源：
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS | 1993年 / 32卷 / 10A期
关键词：
PMOSFET; ELECTRON TRAPPING; DONOR AND ACCEPTOR INTERFACE STATES; GATE CAPACITANCE;
D O I：
10.1143/JJAP.32.L1371
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
Significant generation of hot-carrier induced donor and acceptor interface states in PMOSFET's is observed for the first time from gate-to-drain capacitance C(gd*)s. Plotting the change DELTAC(gd*)s against gate bias reveals two peaks, attributed to donor and acceptor states. A voltage on the drain displaces the donor peak by approximately the amount of the applied voltage, but the acceptor peak shifts by a fixed amount.
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收藏
页码：L1371 / L1373
页数：3
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