PLASMA-ENHANCED CVD OF HIGH-QUALITY INSULATING FILMS

[1] ELECTRONIC-PROPERTIES OF TWO-DIMENSIONAL SYSTEMS [J]. REVIEWS OF MODERN PHYSICS, 1982, 54 (02) : 437 - 672

[2] LOW-TEMPERATURE DEPOSITION OF HIGH-QUALITY SILICON DIOXIDE BY PLASMA-ENHANCED CHEMICAL VAPOR-DEPOSITION [J]. JOURNAL OF APPLIED PHYSICS, 1986, 60 (09) : 3136 - 3145

[3] ELECTRICAL CHARACTERISTICS OF VERY THIN SIO2 DEPOSITED AT LOW SUBSTRATE TEMPERATURES [J]. IEEE ELECTRON DEVICE LETTERS, 1987, 8 (04) : 148 - 150

[4] THIN-FILM TRANSISTORS INCORPORATING A THIN, HIGH-QUALITY PECVD SIO2 GATE DIELECTRIC [J]. IEEE ELECTRON DEVICE LETTERS, 1988, 9 (11) : 576 - 578

[5] DiMaria D.J., 1978, PHYS SIO2 ITS INTERF, P160, DOI [10.1016/B978-0-08-023049-8.50034-8, DOI 10.1016/B978-0-08-023049-8.50034-8]

[6] CHARGE TRAPPING STUDIES IN SIO2 USING HIGH-CURRENT INJECTION FROM SI-RICH SIO2-FILMS [J]. JOURNAL OF APPLIED PHYSICS, 1980, 51 (09) : 4830 - 4841

[7] TRAP CREATION IN SILICON DIOXIDE PRODUCED BY HOT-ELECTRONS [J]. JOURNAL OF APPLIED PHYSICS, 1989, 65 (06) : 2342 - 2356

[8] FEIGL F, 1988, PHYS TODAY, V30, P47

[9] GAAS MIS STRUCTURES WITH SIO2 USING A THIN SILICON INTERLAYER [J]. ELECTRONICS LETTERS, 1988, 24 (18) : 1134 - 1135

[10] CORRELATION OF SURFACE-MORPHOLOGY AND CHEMICAL-STATE OF SI SURFACES TO ELECTRICAL-PROPERTIES [J]. APPLIED SURFACE SCIENCE, 1989, 39 (1-4) : 436 - 456

[1] ELECTRONIC-PROPERTIES OF TWO-DIMENSIONAL SYSTEMS [J]. REVIEWS OF MODERN PHYSICS, 1982, 54 (02) : 437 - 672

[2] LOW-TEMPERATURE DEPOSITION OF HIGH-QUALITY SILICON DIOXIDE BY PLASMA-ENHANCED CHEMICAL VAPOR-DEPOSITION [J]. JOURNAL OF APPLIED PHYSICS, 1986, 60 (09) : 3136 - 3145

[3] ELECTRICAL CHARACTERISTICS OF VERY THIN SIO2 DEPOSITED AT LOW SUBSTRATE TEMPERATURES [J]. IEEE ELECTRON DEVICE LETTERS, 1987, 8 (04) : 148 - 150

[4] THIN-FILM TRANSISTORS INCORPORATING A THIN, HIGH-QUALITY PECVD SIO2 GATE DIELECTRIC [J]. IEEE ELECTRON DEVICE LETTERS, 1988, 9 (11) : 576 - 578

[5] DiMaria D.J., 1978, PHYS SIO2 ITS INTERF, P160, DOI [10.1016/B978-0-08-023049-8.50034-8, DOI 10.1016/B978-0-08-023049-8.50034-8]

[6] CHARGE TRAPPING STUDIES IN SIO2 USING HIGH-CURRENT INJECTION FROM SI-RICH SIO2-FILMS [J]. JOURNAL OF APPLIED PHYSICS, 1980, 51 (09) : 4830 - 4841

[7] TRAP CREATION IN SILICON DIOXIDE PRODUCED BY HOT-ELECTRONS [J]. JOURNAL OF APPLIED PHYSICS, 1989, 65 (06) : 2342 - 2356

[8] FEIGL F, 1988, PHYS TODAY, V30, P47

[9] GAAS MIS STRUCTURES WITH SIO2 USING A THIN SILICON INTERLAYER [J]. ELECTRONICS LETTERS, 1988, 24 (18) : 1134 - 1135

[10] CORRELATION OF SURFACE-MORPHOLOGY AND CHEMICAL-STATE OF SI SURFACES TO ELECTRICAL-PROPERTIES [J]. APPLIED SURFACE SCIENCE, 1989, 39 (1-4) : 436 - 456