RANDOMIZED ALGORITHM FOR CHECKING EQUIVALENCE OF CIRCULAR LISTS

被引:1
作者
ITAI, A
机构
[1] Computer Science Division, University of California, Berkeley
关键词
Circular lists; equivalence checking; randomization;
D O I
10.1016/0020-0190(79)90051-6
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
[No abstract available]
引用
收藏
页码:118 / 121
页数:4
相关论文
共 50 条
[31]   Sequential Equivalence Checking of Clock-Gated Circuits [J].
Dai, Yu-Yun ;
Khoo, Kei-Yong ;
Brayton, Robert K. .
2015 52ND ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2015,
[32]   Proving Termination via Measure Transfer in Equivalence Checking [J].
Milovanovic, Dragana ;
Fuhs, Carsten ;
Bucev, Mario ;
Kuncak, Viktor .
INTEGRATED FORMAL METHODS, IFM 2024, 2025, 15234 :75-84
[33]   Probabilistic equivalence checking of multiple-valued functions [J].
Dubrova, E ;
Sack, H .
JOURNAL OF MULTIPLE-VALUED LOGIC AND SOFT COMPUTING, 2004, 10 (04) :395-414
[34]   On Neural Network Equivalence Checking Using SMT Solvers [J].
Eleftheriadis, Charis ;
Kekatos, Nikolaos ;
Katsaros, Panagiotis ;
Tripakis, Stavros .
FORMAL MODELING AND ANALYSIS OF TIMED SYSTEMS, FORMATS 2022, 2022, 13465 :237-257
[35]   Error Diagnosis in Equivalence Checking of High Performance Microprocessors [J].
sen, Alper .
ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, 2007, 174 (04) :9-18
[36]   Fortifying Analog Models with Equivalence Checking and Coverage Analysis [J].
Horowitz, Mark ;
Jeeradit, Metha ;
Lau, Frances ;
Liao, Sabrina ;
Lim, ByongChan ;
Mao, James .
PROCEEDINGS OF THE 47TH DESIGN AUTOMATION CONFERENCE, 2010, :425-430
[37]   An Equivalence Checking Framework for Array-Intensive Programs [J].
Banerjee, Kunal ;
Mandal, Chittaranjan ;
Sarkar, Dipankar .
AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS (ATVA 2017), 2017, 10482 :84-90
[38]   Equivalence Checking of Non-Binary Combinational Netlists [J].
Singh, Aditi .
2022 35TH INTERNATIONAL CONFERENCE ON VLSI DESIGN (VLSID 2022) HELD CONCURRENTLY WITH 2022 21ST INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (ES 2022), 2022, :22-27
[39]   Using Logic Synthesis and Circuit Reasoning for Equivalence Checking [J].
Fan, Quanrun ;
Pan, Feng ;
Duan, Xindong .
ADVANCED MANUFACTURING SYSTEMS, PTS 1-3, 2011, 201-203 :836-840
[40]   Equivalence checking of arithmetic circuits on the arithmetic bit level [J].
Stoffel, D ;
Kunz, W .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2004, 23 (05) :586-597