Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications

In this paper, we present a low power high temperature 80C51 microcontroller. The low power optimizations are applied at gate and architectural levels, by using extensive clock and data gating, and by completely redesigning the micro-architecture. We also present original clock gating techniques: pre-computed clock gating. To validate these techniques, simulation results are compared with other realizations of the same microcontroller. It shows that gating techniques can achieve good performances. All comparison results are then validated by measures achieved on a chip prototype.