A LOW-TEMPERATURE FABRICATION PROCESS OF POLYCRYSTALLINE SILICON-SILICON P+-N JUNCTION DIODE

被引：0
作者：
WU, CMM
YANG, ES
机构：
来源：
APPLIED PHYSICS LETTERS | 1981年 / 38卷 / 10期
关键词：
D O I：
10.1063/1.92141
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
引用
收藏
页码：813 / 814
页数：2
相关论文
共 50 条
[41]   Enhancing performance of microbolometers by utilizing low-temperature polycrystalline silicon [J].
Jung, Taeseung ;
Kim, Seungyeob ;
Lee, Sangho ;
Ahn, Jinho ;
Jeon, Sanghun .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2024, 42 (06)
[42]   Effects of low-temperature annealing on polycrystalline silicon for solar cells [J].
Slunjski, Robert ;
Capan, Ivana ;
Pivac, Branko ;
Le Donne, Alessia ;
Binetti, Simona .
SOLAR ENERGY MATERIALS AND SOLAR CELLS, 2011, 95 (02) :559-563
[43]   Low-temperature deposition of polycrystalline germanium on silicon by magnetron sputtering [J].
Korivi, N. ;
Nujhat, N. ;
Ahmed, S. ;
Jiang, L. ;
Das, K. .
ELECTRONICS LETTERS, 2018, 54 (17) :1043-+
[44]   LOW-TEMPERATURE POLYCRYSTALLINE-SILICON TFT ON 7059 GLASS [J].
CZUBATYJ, W ;
BEGLAU, D ;
HIMMLER, R ;
WICKER, G ;
JABLONSKI, D ;
GUHA, S .
IEEE ELECTRON DEVICE LETTERS, 1989, 10 (08) :349-351
[45]   A NOVEL P-N-JUNCTION POLYCRYSTALLINE SILICON GATE MOSFET [J].
ANAND, KV ;
CHAMBERLAIN, SG .
INTERNATIONAL JOURNAL OF ELECTRONICS, 1983, 54 (02) :287-298
[46]   A LOW-TEMPERATURE PROCESS FOR ANNEALING EXTREMELY SHALLOW AS+-IMPLANTED N+/P JUNCTIONS IN SILICON [J].
SINGH, R ;
FONASH, SJ ;
ROHATGI, A ;
CHOUDHURY, PR ;
GIGANTE, J .
JOURNAL OF APPLIED PHYSICS, 1984, 55 (04) :867-870
[47]   Low-Temperature Growth of ZnO Nanowire Arrays on p-Silicon (111) for Visible-Light-Emitting Diode Fabrication [J].
Lupan, O. ;
Pauporte, T. ;
Viana, B. .
JOURNAL OF PHYSICAL CHEMISTRY C, 2010, 114 (35) :14781-14785
[48]   Fabrication technologies of polycrystalline silicon thin film transistors at a low temperature [J].
Sameshima, T .
PROCEEDINGS OF THE THIRD SYMPOSIUM ON THIN FILM TRANSISTOR TECHNOLOGIES, 1997, 96 (23) :21-29
[49]   LOW-TEMPERATURE DEPOSITION OF POLYCRYSTALLINE SILICON FILMS ON AMORPHOUS SUBSTRATES BY PARTIALLY IONIZED SILICON BEAMS [J].
YOKOTA, K ;
MIYAURA, T ;
TAKESHITA, K ;
TOKUDA, H ;
TAMURA, S .
FIRST INTERNATIONAL MEETING ON ADVANCED PROCESSING AND CHARACTERIZATION TECHNOLOGIES: FABRICATION AND CHARACTERIZATION OF SEMICONDUCTOR OPTOELECTRONIC DEVICES AND INTEGRATED CIRCUITS, VOLS 1 AND 2, 1989, :A115-A118
[50]   Silicon optical waveguide modulator incorporating a hybrid structure of transistor and p+-n -n+ diode [J].
Chuang, Ricky W. ;
Liao, Zhen-Liang ;
Cheng, Chih-Chieh ;
Hsu, Mao-Teng .
JOURNAL OF CRYSTAL GROWTH, 2009, 311 (03) :833-836
12345