FAULT SIMULATION OF LINEAR ANALOG CIRCUITS

被引：8

作者：

NAGI, N ^{[1
]}

CHATTERJEE, A ^{[1
]}

ABRAHAM, JA ^{[1
]}

机构：

[1] GEORGIA INST TECHNOL,SCH ELECT ENGN,ATLANTA,GA 30332

来源：

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 1993年 / 4卷 / 03期

关键词：

D O I：

10.1007/BF01239077

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Research in the areas of analog circuit fault simulation and test generation has not achieved the same degree of success as its digital counterpart owing to the difficulty in modeling the more complex analog behavior. This article presents a novel approach to this problem by mapping the good and faulty circuits to the discrete Z-domain. An efficient fault simulation is then performed on this discretized circuit for the given input test wave form. This simulator provides an order of magnitude speedup over traditional circuit simulators. An efficient fault simulator and the formulation of analog fault models opens up the ground for analog automatic test generation.

引用

页码：245 / 260

页数：16

共 15 条

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