A NEW EFFICIENT MEMORYLESS RESIDUE TO BINARY CONVERTER

被引：59
作者：
ANDRAOS, S
AHMAD, H
机构：
[1] Department of Electrical Engineering, Faculty of Engineering and Technology, Univcrsity of Jordan, Amman
[2] P.O. Box 2K6, Jordan
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1988年 / 35卷 / 11期
关键词：
Integrated Circuits - Mathematical Techniques--Algorithms - Numbering Systems;
D O I：
10.1109/31.14470
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper describes an algorithm, which converts the moduli (2k+1.2k, 2k-l) residue numbers into their binary equivalent. A hardware implementation for this algorithm was constructed using binary adders only. The proposed algorithm and its implementation have the following advantages. © 1988 IEEE
引用
收藏
页码：1441 / 1444
页数：4
相关论文
共 4 条
[1]  
BERNARDSON P, 1985, IEEE T CIRCUITS SYST, V32, P298
[2]   TECHNIQUES FOR RESIDUE-TO-ANALOG CONVERSION FOR RESIDUE-ENCODED DIGITAL-FILTERS [J].
JENKINS, WK .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1978, 25 (07) :555-562
[3]  
Szabo N., 1967, RESIDUE ARITHMETIC I
[4]   AN EFFICIENT RESIDUE-TO-DECIMAL CONVERTER [J].
TAYLOR, FJ ;
RAMNARAYANAN, AS .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1981, 28 (12) :1164-1169
1