TRADING SPEED FOR LOW-POWER BY CHOICE OF SUPPLY AND THRESHOLD VOLTAGES

The trading of speed for low power consumption in CMOS VLSI by using the supply voltage and the threshold voltage as variables has been investigated. It is shown that it is desirable to minimize the supply voltage for minimizing the power consumption. We have investigated both the lower bound of the supply voltage and the possible decrease in power consumption without speed loss under different circuit constraints and calculated the consequences on circuit performance. Results show, for example, that power reductions of about 40 times can be obtained without speed loss by using supply voltages down to about 0.48 V.