A SHALLOW JUNCTION SUBMICROMETER PMOS PROCESS WITHOUT HIGH-TEMPERATURE ANNEALS

被引：22

作者：

CAREY, PG

WEINER, KH

SIGMON, TW

机构：

来源：

IEEE ELECTRON DEVICE LETTERS | 1988年 / 9卷 / 10期

关键词：

D O I：

10.1109/55.17838

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：542 / 544

页数：3

共 13 条

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[8] FORMATION OF SHALLOW P+N JUNCTIONS BY B-ION IMPLANTATION IN SI SUBSTRATES WITH AMORPHOUS LAYERS [J].

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JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1985, 24 (05) :568-573

[9] NUMERICAL-SIMULATION OF THE GAS IMMERSION LASER DOPING (GILD) PROCESS IN SILICON [J].

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