CURRENT-MODE CMOS QUATERNARY THRESHOLD LOGIC FULL ADDER CIRCUIT

被引：1
作者：
CURRENT, KW
机构：
[1] Electrical and Computer Engineering Department, University of California, Davis, CA
来源：
INTERNATIONAL JOURNAL OF ELECTRONICS | 1993年 / 74卷 / 04期
关键词：
D O I：
10.1080/00207219308925862
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The quaternary full adder accepts two quaternary inputs and a binary CARRY input and develops a two-quaternary-digit output word that is the base-four sum of the inputs. A current-mode CMOS circuit is presented that implements the quaternary threshold logic full adder function more area efficiently, with fewer current comparators and decoders (and hence transistors), than previously reported. It has been realized in standard polysilicon-gate CMOS technology.
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收藏
页码：587 / 591
页数：5
相关论文
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