RESTRUCTURING FOR FAULT-TOLERANT SYSTOLIC ARRAYS

被引：8

作者：

LI, HF

JAYAKUMAR, R

LAM, C

机构：

来源：

关键词：

D O I：

10.1109/12.16511

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：307 / 311

页数：5

共 14 条

[1]

Fussell D., 1982, 9th Annual Symposium on Computer Architecture, P190

[2]

Greene J. W., 1983, Third Caltech Conference on Very Large Scale Integration, P165

[3]

GUPTA V, 1983, TR83061 SUNY DEP COM

[4]

HEDLUND KS, 1982, CSDTR422 PURD U TECH

[5]

KOREN I, 1981, 8TH P INT S COMP ARC, P442

[6]

KUNG H, 1984, 1984 P C ADV RES VLS, P74

[7]

KUNG HT, 1982, COMPUTER, V15, P37, DOI 10.1109/MC.1982.1653825

[8]

KUNG HT, 1979, JAN P C VLSI ARCH DE, P65

[9] WAFER-SCALE INTEGRATION OF SYSTOLIC ARRAYS. [J].

Leighton, Tom ;

Leiserson, Charles E. .

[10]

LEISERSON CE, 1983, J VLSI COMPUT SYST, V1, P41