A BIPOLAR 18K-GATE VARIABLE SIZE CELL MASTERSLICE

被引：1

作者：

NISHIMURA, T

SATO, H

TATSUKI, M

HIRAO, T

KURAMITSU, Y

机构：

来源：

关键词：

D O I：

10.1109/JSSC.1986.1052601

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：727 / 732

页数：6

共 9 条

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[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (05) : 1025 - 1031
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[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (04) : 474 - 479
[9] AN ECL 5000-GATE GATE ARRAY WITH 190-PS GATE DELAY
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