VERY WIDE-RANGE PHASE-LOCKED LOOP

被引：0
|
作者：
SMITH, DT
机构：
[1] Clarendon Laboratory, University of Oxford, Oxford, OX1 3PU, Parks Road
来源：
INTERNATIONAL JOURNAL OF ELECTRONICS | 1991年 / 70卷 / 02期
关键词：
3;
D O I：
10.1080/00207219108921292
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A phase-locked loop is described that will capture and lock to any input frequency in the range 1 Hz to 1 MHz without any adjustment. A DC signal proportional to the logarithm of the input frequency is available.
引用
收藏
页码：443 / 445
页数：3
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