共 3 条
[1]
Orchard HJ, 1966, ELECTRON LETT, V2, P224, DOI [10.1049/el:19660190, DOI 10.1049/EL:19660190]
[2]
FIRST-ORDER SENSITIVITY AND WORST CASE ANALYSIS OF DOUBLY TERMINATED REACTANCE 2-PORTS
[J].
IEEE TRANSACTIONS ON CIRCUIT THEORY,
1973, CT20 (05)
:567-571
[3]
LOWER BOUNDS ON SUMMED ABSOLUTE AND SQUARED VOLTAGE TRANSFER SENSITIVITIES IN RLC NETWORKS
[J].
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,
1978, 25 (02)
:70-73