A CMOS ANALOG MULTI-SINUSOIDAL PHASE-LOCKED-LOOP

被引:2
作者
PADMANABHAN, M [1 ]
MARTIN, K [1 ]
机构
[1] UNIV TORONTO,DEPT ELECT ENGN,TORONTO M5S 1A4,ONTARIO,CANADA
基金
美国国家科学基金会;
关键词
D O I
10.1109/4.309900
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An analog CMOS IC is described that is capable of tracking and isolating the sinusoidal components of a two-sinusoidal input signal, though the algorithm can be easily generalized to deal with a larger number of input sinusoids. It is based on adapting the parameters of an IIR filter; the filter topology takes on the form of resonators in a feedback loop, and the adaptive algorithm moves these resonator frequencies until they are equal to the input frequencies, at which point, the isolated sinusoids are available at the resonator outputs. The adaptive filter features a minimal hardware complexity (to track l sinusoids, exactly l second order resonators are needed), and also gets around the convergence problems normally associated with IIR adaptive filters. This filter was implemented in the continuous-time domain using a G(m)-C architecture, with the G(m) being used to tune the resonator frequency. The chip was fabricated using a 2-mum digital CMOS process, with poly resistors, and metal1-metal2 capacitors. It was tested and shown to be fully functional, with a useful tracking range of almost-equal-to 500-800 KHz around the initial frequency of each resonator.
引用
收藏
页码:1046 / 1057
页数:12
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