A HIGH-PERFORMANCE BICMOS TECHNOLOGY WITH DOUBLE-POLYSILICON SELF-ALIGNED BIPOLAR-DEVICES

被引：5

作者：

RAJKANAN, K

GHEEWALA, TR

DIEDRICK, J

机构：

来源：

IEEE ELECTRON DEVICE LETTERS | 1987年 / 8卷 / 11期

关键词：

D O I：

10.1109/EDL.1987.26711

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：509 / 511

页数：3

共 16 条

[1]

Alvarez A. R., 1984, International Electron Devices Meeting. Technical Digest (Cat. No. 84CH2099-0), P761

[2]

Emerald P. R., 1986, Proceedings of the IEEE 1986 Custom Integrated Circuits Conference (Cat. No.86CH2258-2), P138

[3]

Hickman P. T., 1986, Proceedings of the IEEE 1986 Custom Integrated Circuits Conference (Cat. No.86CH2258-2), P562

[4]

Higuchi H., 1984, International Electron Devices Meeting. Technical Digest (Cat. No. 84CH2099-0), P694

[5] CMOS/BIPOLAR CIRCUITS FOR 60-MHZ DIGITAL PROCESSING [J].

HOTTA, T ;

MASUDA, I ;

MAEJIMA, H ;

UENO, M ;

IWAMURA, M ;

KURITA, K ;

HOTTA, A .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (05) :808-813

[6]

HUDSON EL, 1982, ISSCC, P248

[7]

Ikeda T., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P408

[8]

Kobayashi Y., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P802

[9]

LIN HC, 1969, IEEE T ELECTRON DEV, VED16, P945, DOI 10.1109/T-ED.1969.16885

[10] 1.0-MU-M N-WELL CMOS BIPOLAR TECHNOLOGY [J].

MOMOSE, H ;

SHIBATA, H ;

SAITOH, S ;

MIYAMOTO, J ;

KANZAKI, K ;

KOHYAMA, S .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1985, 32 (02) :217-223

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