CMOS PROGRAMMABLE DELAY VERNIER

被引:0
|
作者
GOTO, M
BARNES, JO
OWENS, RE
机构
来源
HEWLETT-PACKARD JOURNAL | 1994年 / 45卷 / 05期
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页码:51 / 58
页数:8
相关论文
共 50 条
  • [1] A high-resolution programmable Vernier delay generator based on carry chains in FPGA
    Cui, Ke
    Li, Xiangyu
    Zhu, Rihong
    REVIEW OF SCIENTIFIC INSTRUMENTS, 2017, 88 (06):
  • [2] THE VERNIER DELAY UNIT
    PIERCE, WB
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1985, 32 (01) : 95 - 99
  • [3] A low power thyristor-based CMOS programmable delay element
    Zhang, JM
    Cooper, SR
    LaPietra, AR
    Mattern, MW
    Guidash, RM
    Friedman, EG
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS, 2004, : 769 - 772
  • [4] A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line
    Dudek, P
    Szczepanski, S
    Hatfield, JV
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (02) : 240 - 247
  • [5] The delay vernier pattern generation technique
    Moyer, GC
    Clements, M
    Liu, WT
    Schaffer, T
    Cavin, RK
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (04) : 551 - 562
  • [6] A high-resolution programmable Vernier delay generator based on carry chains in FPGA (vol 88, 064703, 2017)
    Cui, Ke
    Li, Xiangyu
    Zhu, Rihong
    REVIEW OF SCIENTIFIC INSTRUMENTS, 2019, 90 (10):
  • [7] Programmable Optical Vernier-Sampled Coherent Ranging
    Bak, Seongjin
    Jang, Hansol
    Jung, Min Uk
    Kim, Gyeong Hun
    Jo, Minsik
    Lee, Hwidon
    Kim, Chang-Seok
    LASER & PHOTONICS REVIEWS, 2023, 17 (07)
  • [8] Area-efficient digitally controlled CMOS feedback delay element with programmable duty cycle
    Kim, Jongsun
    IEICE ELECTRONICS EXPRESS, 2009, 6 (04): : 193 - 197
  • [9] A CMOS DCO design using delay programmable differential latches and a novel digital control scheme
    S. M. Rezaul Hasan
    Electrical Engineering, 2007, 89 : 569 - 576
  • [10] A CMOS DCO design using delay programmable differential latches and a novel digital control scheme
    Hasan, S. M. Rezaul
    ELECTRICAL ENGINEERING, 2007, 89 (07) : 569 - 576