FULL CMOS VIDEO LINE-LOCKED PHASE-LOCKED LOOP SYSTEM

被引：3

作者：

RODDA, WE ^{[1
]}

CAMPBELL, ER ^{[1
]}

SAUER, DJ ^{[1
]}

MAYWEATHER, WT ^{[1
]}

DELLOVA, F ^{[1
]}

机构：

[1] THOMSON CONSUMER ELECT COMPONENTS,MEYLAN,FRANCE

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1993年 / 39卷 / 03期

关键词：

D O I：

10.1109/30.234626

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A CMOS PLL system for generation of a television line-locked clock in the frequency range 25 MHz to 40 MHz is described. The PLL system is designed for use as a generic building block with large scale CMOS video signal processing integrated circuits. The development of a custom test chip version of the PLL system is reported.

引用

页码：496 / 503

页数：8

共 50 条

[31] Phase-Locked Loop Is a Kind of Power System Stabilizer
He, Wei
IEEE TRANSACTIONS ON POWER SYSTEMS, 2019, 34 (06) : 5080 - 5082
[32] Basic Concepts of a Phase-Locked Loop Control System
Sefraoui, Hanane
Salmi, Khalid
Ziyyat, Abdelhak
INTERNATIONAL JOURNAL OF ONLINE AND BIOMEDICAL ENGINEERING, 2022, 18 (13) : 25 - 37
[33] Self-Injection Locked Phase-Locked Loop OEO
Zhang, Li
Poddar, Ajay K.
Rohde, Ulrich L.
Daryoush, Afshin S.
2013 IEEE MTT-S INTERNATIONAL MICROWAVE AND RF CONFERENCE, 2013,
[34] A CMOS phase-locked loop for cable DTV and its phase noise analysis
National ASIC System and Engineering Research Center, Southeast University, Nanjing 210096, China
Guti Dianzixue Yanjiu Yu Jinzhan, 2008, 4 (591-596):
[35] A 2.9 GHz CMOS Phase-Locked Loop with Improved Ring Oscillator
Zhang, Yating
Xing, Zhao
Peng, Yu
Zhang, Tian
Liu, Huihua
Wu, Yunqiu
Zhao, Chenxi
Kang, Kai
2019 IEEE MTT-S INTERNATIONAL WIRELESS SYMPOSIUM (IWS 2019), 2019,
[36] A fully integrated 1.2-GHz CMOS phase-locked loop
Zhao, K
Man, JH
Ye, Q
Ye, TC
2005 6TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, BOOKS 1 AND 2, 2005, : 544 - 547
[37] Hot Carrier Effects on CMOS Phase-Locked Loop Frequency Synthesizers
Liu, Yang
Srivastava, Ashok
PROCEEDINGS OF THE ELEVENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2010), 2010, : 92 - 98
[38] A Novel Phase-locked Loop for HVDC
Gong Y.
Wang J.
Wang Z.
Fu C.
Dianwang Jishu/Power System Technology, 2019, 43 (11): : 4097 - 4104
[39] PHASE-LOCKED LOOP WITH SAW CONVOLVER
TARASOV, VM
BRIGIN, SI
IZVESTIYA VYSSHIKH UCHEBNYKH ZAVEDENII RADIOELEKTRONIKA, 1984, 27 (10): : 89 - 90
[40] DYNAMICS OF DIGITAL PHASE-LOCKED LOOP
MAKSAKOV, VP
RADIOTEKHNIKA I ELEKTRONIKA, 1988, 33 (05): : 999 - 1007

← 1 2 3 4 5 →