FULL CMOS VIDEO LINE-LOCKED PHASE-LOCKED LOOP SYSTEM

被引：3

作者：

RODDA, WE ^{[1
]}

CAMPBELL, ER ^{[1
]}

SAUER, DJ ^{[1
]}

MAYWEATHER, WT ^{[1
]}

DELLOVA, F ^{[1
]}

机构：

[1] THOMSON CONSUMER ELECT COMPONENTS,MEYLAN,FRANCE

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1993年 / 39卷 / 03期

关键词：

D O I：

10.1109/30.234626

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A CMOS PLL system for generation of a television line-locked clock in the frequency range 25 MHz to 40 MHz is described. The PLL system is designed for use as a generic building block with large scale CMOS video signal processing integrated circuits. The development of a custom test chip version of the PLL system is reported.

引用

页码：496 / 503

页数：8

共 50 条

[1] CMOS switched current phase-locked loop
Leenaerts, DMW
Persoon, GG
Putter, BM
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 1997, 144 (02): : 75 - 77
[2] CMOS switched current phase-locked loop
Technical Univ Eindhoven, Eindhoven, Netherlands
IEE Proc Circuits Devices Syst, 2 (75-77):
[3] PHASE-LOCKED LOOP
MCLEAN, D
CONTROL, 1967, 11 (109): : 339 - &
[4] A phase-locked loop
Shahruz, SM
REVIEW OF SCIENTIFIC INSTRUMENTS, 2001, 72 (03): : 1888 - 1892
[5] A new phase-locked loop (PLL) system
Karimi-Ghartemani, M
Iravani, MR
PROCEEDINGS OF THE 44TH IEEE 2001 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2001, : 421 - 424
[6] A kind of phase-locked loop for power system
Zhang, Zhixia
Piao, Zailin
Guo, Dan
Xie, Ying
Diangong Jishu Xuebao/Transactions of China Electrotechnical Society, 2012, 27 (02): : 250 - 254
[7] THE DYNAMICS OF A DELAYED PHASE-LOCKED LOOP SYSTEM
EFREMOV, IA
UDALOV, NN
TELECOMMUNICATIONS AND RADIO ENGINEERING, 1990, 45 (03) : 114 - 116
[8] A CMOS phase-locked loop with an auto-calibrated VCO
Fouzar, Y
Savaria, Y
Sawan, M
2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III, PROCEEDINGS, 2002, : 177 - 180
[9] Linear Phase-Locked Loop
Miskovic, Vlatko
Blasko, Vladimir
Jahns, Thomas M.
Lorenz, Robert D.
Jorgensen, Per M.
2018 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE), 2018, : 5677 - 5683
[10] A SAMPLED PHASE-LOCKED LOOP
ATHERTON, JP
IEE PROCEEDINGS-A-SCIENCE MEASUREMENT AND TECHNOLOGY, 1982, 129 (06): : 396 - 398

← 1 2 3 4 5 →