Synthesis of FSMs Based on Architectural Decomposition with Joined Multiple Encoding

被引：7

作者：

Bukowiec, Arkadiusz ^{[1
]}

机构：

[1] Univ Zielona Gora, Inst Comp Engn & Elect, Licealna 9, PL-65417 Zielona Gora, Poland

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS | 2012年 / 58卷 / 01期

关键词：

Boolean algebra; circuit synthesis; Field Programmable Gate Arrays; sequential circuits;

D O I：

10.2478/v10177-012-0005-7

中图分类号：

TN [电子技术、通信技术];

学科分类号：

0809 ;

摘要：

The method of synthesis of the logic circuit of finite state machine (FSM) with Mealy's outputs is proposed in this paper. Proposed method is based on the innovate encoding of microinstructions split into subsets. Code of microinstruction is represented as a part of current state code and code of microinstruction inside of current subset. It leads to realization of FSM as s double-level structure. It leads to diminishing of number of variables required for encoding of microinstructions. Such approach permits to decrease the number of required outputs of combinational part of FSM.

引用

页码：35 / 41

页数：7