ESD RELIABILITY AND PROTECTION SCHEMES IN SOI CMOS OUTPUT BUFFERS

被引:8
作者
CHAN, MS [1 ]
YUEN, SS [1 ]
MA, ZJ [1 ]
HUI, KY [1 ]
KO, PK [1 ]
HU, CM [1 ]
机构
[1] HONG KONG UNIV SCI & TECHNOL,HONG KONG,HONG KONG
关键词
CMOS integrated circuits - Electric currents - Electric discharges - Etching - Failure analysis - MOSFET devices - Oxides - Protection - Reliability - Silicon on insulator technology - Silicon wafers - Substrates;
D O I
10.1109/16.464414
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The electrostatic discharge (ESD) protection capability of SOI CMOS output buffers has been studied with Human Body Model (HEM) stresses. Experimental results show that the ESD voltage sustained by SOI CMOS buffers is only about half the voltage sustained by the bulk NMOS buffers. ESD discharge current in a SOI CMOS buffer is found to be absorbed by the NMOSFET alone. Also, SOI circuits display more serious reliability problem in handling negative ESD discharge current during bi-directional stresses, Most of the methods developed for bulk technology to improve ESD performance have minimal effects on SOI. A new Through Oxide Buffer ESD protection scheme is proposed as an alternative for SOI ESD protection, Zn order to improve ESD reliability, ESD protection circuitries can be fabricated on the SOI substrate instead of the top silicon thin film, after selectively etching through the buried oxide. This scheme also allows ESD protection strategies developed for bulk technology to be directly transferred to SOI substrate.
引用
收藏
页码:1816 / 1821
页数:6
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