A Programmable Digital Filter IC Employing Multiple Processors on a Single Chip

A new programmable general-purpose digital filter IC is described that employs multiple processing units on a single chip. The multiple processors operate in parallel and communicate with one another through on-chip dual-access storage register blocks. The topology of the digital fitter chip has the processors arranged as a ring with the locally shared register blocks between each adjacent pair of processors. We show that this ring of processors Is capable of realizing a rich variety of filter structures operating at the maximum possible Instruction execution rate, i.e., requiring the minimum number of program steps per data sample that can possibly be achieved for any custom parallel-processing implementation. Fast real-time processing, at rates appropriate for video applications, is obtained by using a fast hardware multiplier to each processor and by employing a design that permits each processor to simultaneously execute multiplication and addition operations [a a single Instruction cycle. One of the advantages of our design Is the "free" passing of data between adjacent processors due to each register block's dual port. A ring of five such processors can be implemented In 2-mu m CMOS technology on a single chip with dimensions 7.9 mm x 9.2 mm operating at data rates up to 40 MHz.