A HIGH-SPEED LOW-COST MODULO PI MULTIPLIER WITH RNS ARITHMETIC APPLICATIONS

被引:16
作者
SODERSTRAND, MA
VERNIA, C
机构
关键词
D O I
10.1109/PROC.1980.11678
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:529 / 532
页数:4
相关论文
共 16 条
[1]   DECODING TECHNIQUES FOR RESIDUE NUMBER SYSTEM REALIZATIONS OF DIGITAL SIGNAL-PROCESSING HARDWARE [J].
BARANIECKA, A ;
JULLIEN, GA .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1978, 25 (11) :935-936
[2]  
BEADLES RL, 1966, THESIS U PITTSBURG
[3]  
FRAENKEL AS, 1961, J ACM, V8, P87, DOI 10.1145/321052.321057
[4]  
JENKINS WK, 1977, IEEE T CIRCUITS SYST, V24, P191, DOI 10.1109/TCS.1977.1084321
[5]  
JENKINS WK, 1977, 20TH P MIDW S CIRC 1, P58
[6]  
JULLIEN GA, 1978, IEEE T COMPUT, V27, P325, DOI 10.1109/TC.1978.1675105
[7]  
JULLIEN GA, 1977, MAY P IEEE INT C AC, P506
[8]  
MILLER IA, 1955, ELECTRONICS, V28
[9]  
NUSSABAUMER H, 1976, ELECTRON LETT, V11, P294
[10]  
OKEEFE KH, 1971, 1971 P MEX IEEE INT, V2, P669